    /*====================================================================*
     *
     *   Copyright (c) 2013 Qualcomm Atheros, Inc.
     *
     *   All rights reserved.
     *
     *   Redistribution and use in source and binary forms, with or
     *   without modification, are permitted (subject to the limitations
     *   in the disclaimer below) provided that the following conditions
     *   are met:
     *
     *   * Redistributions of source code must retain the above copyright
     *     notice, this list of conditions and the following disclaimer.
     *
     *   * Redistributions in binary form must reproduce the above
     *     copyright notice, this list of conditions and the following
     *     disclaimer in the documentation and/or other materials
     *     provided with the distribution.
     *
     *   * Neither the name of Qualcomm Atheros nor the names of
     *     its contributors may be used to endorse or promote products
     *     derived from this software without specific prior written
     *     permission.
     *
     *   NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
     *   GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE
     *   COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
     *   IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     *   WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     *   PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
     *   OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     *   NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     *   LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     *   HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     *   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
     *   OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     *   SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *--------------------------------------------------------------------*/

    /*====================================================================*
     *
     *   signed WriteParameters1 (struct plc * plc, unsigned module, const struct nvm_header1 * nvm_header);
     *
     *   plc.h
     *
     *   read a powerline parameter block image from plc->PIB and write
     *   the image to SDRAM; this function assumes that plc->PIB is an
     *   image chain and is positioned to the start of the PIB image in
     *   that chain;
     *
     *   in reality, this function should never be called because there
     *   are no cases that require it but it has been implemented for
     *   completeness;
     *
     *   the boot loader must be running for this to work since runtime
     *   firmware ignores VS_WR_MEM messages;
     *
     *   future devices will ignore VS_WR_MEM messages so use function
     *   WriteExecuteParameters1, instead;
     *
     *   this function makes no attempt to validate the information sent
     *   to the device;
     *
     *
     *   Contributor(s):
     *      Charles Maier <cmaier@qca.qualcomm.com>
     *
     *--------------------------------------------------------------------*/

    #ifndef WRITEPARAMETERS1_SOURCE
    #define WRITEPARAMETERS1_SOURCE

    #include <stdint.h>
    #include <unistd.h>
    #include <memory.h>

    #include "../tools/files.h"
    #include "../tools/error.h"
    #include "../tools/memory.h"
    #include "../plc/plc.h"

    signed WriteParameters1 (struct plc * plc, unsigned module, const struct nvm_header1 * nvm_header)

    {
    	struct channel * channel = (struct channel *)(plc->channel);
    	struct message * message = (struct message *)(plc->message);

    #ifndef __GNUC__
    #pragma pack (push,1)
    #endif

    	struct __packed vs_wr_mem_request
    	{
    		struct ethernet_hdr ethernet;
    		struct qualcomm_hdr qualcomm;
    		uint32_t MOFFSET;
    		uint32_t MLENGTH;
    		uint8_t BUFFER [PLC_RECORD_SIZE];
    	}
    	* request = (struct vs_wr_mem_request *) (message);
    	struct __packed vs_wr_mem_confirm
    	{
    		struct ethernet_hdr ethernet;
    		struct qualcomm_hdr qualcomm;
    		uint8_t MSTATUS;
    		uint32_t MOFFSET;
    		uint32_t MLENGTH;
    	}
    	* confirm = (struct vs_wr_mem_confirm *) (message);

    #ifndef __GNUC__
    #pragma pack (pop)
    #endif

    	uint32_t length = PLC_RECORD_SIZE;
    	uint32_t offset = LE32TOH (nvm_header->IMAGEADDRESS);
    	uint32_t extent = LE32TOH (nvm_header->IMAGELENGTH);
    	Request (plc, "Write %s (%d) (%08X:%d)", plc->PIB.name, module, offset, extent);
    	while (extent)
    	{
    		memset (message, 0, sizeof (* message));
    		EthernetHeader (&request->ethernet, channel->peer, channel->host, channel->type);
    		QualcommHeader (&request->qualcomm, 0, (VS_WR_MEM | MMTYPE_REQ));
    		if (length > extent)
    		{
    			length = extent;
    		}
    		if (read (plc->PIB.file, request->BUFFER, length) != (signed)(length))
    		{
    			error (1, errno, FILE_CANTREAD, plc->PIB.name);
    		}
    		request->MLENGTH = HTOLE32 (length);
    		request->MOFFSET = HTOLE32 (offset);
    		plc->packetsize = sizeof (* request);
    		if (SendMME (plc) <= 0)
    		{
    			error (PLC_EXIT (plc), errno, CHANNEL_CANTSEND);
    			return (-1);
    		}
    		if (ReadMME (plc, 0, (VS_WR_MEM | MMTYPE_CNF)) <= 0)
    		{
    			error (PLC_EXIT (plc), errno, CHANNEL_CANTREAD);
    			return (-1);
    		}
    		if (confirm->MSTATUS)
    		{
    			Failure (plc, PLC_WONTDOIT);
    			return (-1);
    		}
    		if (LE32TOH (confirm->MLENGTH) != length)
    		{
    			error (PLC_EXIT (plc), 0, PLC_ERR_LENGTH);
    			return (-1);
    		}
    		if (LE32TOH (confirm->MOFFSET) != offset)
    		{
    			error (PLC_EXIT (plc), 0, PLC_ERR_OFFSET);
    			return (-1);
    		}
    		offset += length;
    		extent -= length;
    	}
    	return (0);
    }

    #endif

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